The present invention relates to an improved tuning circuit for high frequency receivers, particularly of the type employing a digital input keyboard for reading in of the desired tuning frequency and an electronic tuning adjustment.
Copending U.S. patent application, Ser. No. 708,754, filed July 26, 1976, by Otto Klank et al., the subject matter of which is hereby incorporated by reference, discloses a tuning circuit for a high frequency receiver including a superheterodyne oscillator whose frequency is variable by means of a supplied tuning voltage in order to tune the receiver to desired stations. The tuning circuit includes a comparison circuit which receives two numbers which are compared to produce the tuning voltage. One of these numbers represents the counting state of a counter which periodically counts the oscillations of the superheterodyne oscillator under consideration of the intermmediate frequency, and thus constitutes the value of the received frequency. The other number is fed to the comparison circuit via an input keyboard with series-connected coder and represents the frequency of the station to which the receiver is to be tuned. From the deviation between the two numbers as determined in the comparison circuit, the tuning voltage is derived whereupon the set is tuned to the station represented by the number provided by the input keyboard.
The invention in the above-identified application basically resides in the fact that a single comparator is provided which is suitable for the comparison at one time, of only one digit of the two numbers. This comparator receives the digits of the two numbers to be compared in succession in multiplex operation beginning with the digit having the greatest significance. Multiplex operation results in the advantage, inter alia, that only few connecting lines are required to connect the comparison circuit. This is of advantage if the comparison circuit is realized in the integrated MOS technique where there exists the desire to keep the number of connecting terminals for the integrated circuit as low as possible.
In the above-identified application in which the received frequency is also indicated on a display device operating in the same multiplex mode, the multiplex phase signals required for comparison of the two numbers are obtained directly from the multiplex phase signals for the display device. These signals actuate in timely succession the display elements provided for the individual digits of the number to be displayed so that a digit can be displayed thereon. There now often exists the necessity to not actuate one or even several of the provided display elements because, for example, in accordance with the frequency band involved, the number involved has only four digits or leading zeroes are to be blanked out although a total of five display elements, for example, are provided. Such blanking out would not be possible, however, if the multiplex phase signals for the display device were simultaneously to be used also for the comparison circuit since the signals for controlling the comparison circuit would then be incomplete.
In the above-identified application in addition to the multiplex phase signals, other signals required by the comparison circuit are obtained likewise from the counting device, thus requiring a relatively large number of connecting lines leading from the counting device to the remainder of the tuning circuit. This is a drawback, however, particularly if the comparison circuit is to be realized as or part of an integrated MOS circuit (IC). In this case it is necessary for the IC to have a relatively large number of external terminals which makes its production more expensive.